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The circuit shown (a NOR gate followed by a NAND gate with both its inputs joined together, followed by a NOT gate) is equivalent to -
A
NOR gate
B
OR gate
C
AND gate
D
NAND gate
Detailed Solution
Let the two inputs be $A$ and $B$.
Output of the first (NOR) gate: $Y_1 = \overline{A + B}$
This output is fed to both inputs of the NAND gate. A NAND gate with its inputs joined works as a NOT gate:
$Y_2 = \overline{Y_1 \cdot Y_1} = \overline{Y_1} = \overline{\overline{A + B}} = A + B$
The last gate is a NOT gate, so the final output is $Y = \overline{Y_2} = \overline{A + B}$
$Y = \overline{A + B}$ is the output of a NOR gate.
Hence the combination acts as a NOR gate.
Output of the first (NOR) gate: $Y_1 = \overline{A + B}$
This output is fed to both inputs of the NAND gate. A NAND gate with its inputs joined works as a NOT gate:
$Y_2 = \overline{Y_1 \cdot Y_1} = \overline{Y_1} = \overline{\overline{A + B}} = A + B$
The last gate is a NOT gate, so the final output is $Y = \overline{Y_2} = \overline{A + B}$
$Y = \overline{A + B}$ is the output of a NOR gate.
Hence the combination acts as a NOR gate.