[add image: input waveforms A, B, C and the logic circuit – AND gate (A, B) and NAND gate (B, C) feeding an OR gate] $Y = A \cdot B + \overline{B \cdot C}$ 0 to $t_1$: A = 0, B = 0, C = 1 ⇒ $Y = 0 + \overline{0} = 1$ $t_1$ to $t_2$: A = 1, B = 0, C = 1 ⇒ $Y = 0 + \overline{0} = 1$ $t_2$ to $t_3$: A = 0, B = 1, C = 0 ⇒ $Y = 0 + \overline{0} = 1$ Checking all intervals in the same way, Y = 1 throughout, so the output is a constant 5 V (high). [add image: y – constant 5 V]